1. Field of the Invention
The present invention relates to a buffer circuit, a device to which the buffer circuit is applied, an electronic device, and the like.
2. Description of the Related Art
In recent years, display devices such as liquid crystal display devices and light-emitting devices are becoming widespread. In addition, with the development of the information society, the absolute quantity of information to be handled has been drastically increased; thus, memory devices or the like have been also developed.
In such display devices and memory devices, a plurality of transistors are provided in a matrix. The plurality of transistors provided in a matrix are controlled by scanning lines, and are supplied with data by signal lines. Note that such transistors formed over the same substrate preferably have the same conductivity type in order to improve the productivity.
The transistors are provided in a matrix over the substrate, and over this substrate, signals to be supplied to the scanning lines are supplied from a shift register circuit (see Patent Document 1, for example) or a buffer circuit.
However, in a conventional buffer circuit provided with transistors that have the same conductivity type (shown in FIG. 2, for example), the transistor, one of a source and a drain of which is connected to an output portion and the other of the source and the drain of which is connected to a power supply line (a high-potential-side power supply line Vdd in the case of an n-channel transistor, and a low-potential-side power supply line Vss in the case of a p-channel transistor), acts to reduce the gain of the buffer circuit when the gain of the transistor itself is increased.
Note that the size of this transistor cannot be made sufficiently large in order to ensure the high gain of the buffer circuit and the slew rate of voltage of the output portion is determined depending on a value of current flowing from this transistor. Therefore, there is a problem in that the slew rate is difficult to improve.
Note that in this specification, the “slew rate” is a value obtained by dividing an output voltage by a rising time (in the case of an n-channel transistor) or a falling time (in the case of a p-channel transistor), and is also called a rising characteristic (in the case of the n-channel transistor) or a falling characteristic (in the case of the p-channel transistor).